The Asian Test Symposium (ATS) provides an open forum for researchers and industrial practitioners from all countries of the world to exchange innovative ideas on system, board, and device testing with design, manufacturing and field consideration in mind. 

The 33^rd IEEE Asian Test Symposium (ATS 2024) is going to be held at Ahmedabad, Gujarat (India), the epicentre of India Semiconductor Mission during December 17-20, 2024.

Scope

Original papers on, but not limited to, the following areas are invited:
• Analog/Mixed-Signal Test
• Automatic Test Generation
• Board Test and Diagnosis
• Boundary Scan Test
• Built-In Self-Test (BIST)
• Defect-Based Test
• Delay and Performance Test
• Dependability and Functional Safety
• Design for Test (DFT)
• Diagnosis and Silicon Debug
• Economic of Test
• Failure Analysis
• Fault Modelling and Simulation
• Fault Tolerance
• GPU Test
• High-Speed I/O Test
• Low-Power IC Test
• Memory Test and Repair
• Test for MEMS and Microfluidic Systems
• Multi-/Many-core Processor Test
• Test for Nanoscale Devices and Emerging Technologies
• On-line Test
• Power/Thermal/Reliability Issues in Test
• Reconfigurable System Test
• Test for Biomedical Circuits and Systems
• RF Test
• Hardware-oriented Security and Trust
• Self-Repair
• Test for Sensors and IoT
• SiP, Stacked, 3D IC Test
• Standards in Test
• Machine Learning in Test
• Test Compression
• Test Quality
• Test Synthesis
• Validation and Verification
• Yield Analysis and Enhancement
• Test for Reversible and Quantum Circuits

Regular Sessions: The ATS’24 Program Committee invites original, unpublished paper submissions on the above topics. Paper submissions should be complete manuscripts, not exceeding six pages (including figures, tables, and bibliography) in a standard IEEE two-column format. The submission will be considered evidence that upon acceptance the author(s) will submit a final camera-ready version of the paper or inclusion in the proceedings, and will present the paper at the symposium. ATS reserves the right to remove from IEEE Xplore papers not presented at the symposium. The best paper will be selected by the ATS’24 Program Committee for the best paper award based on the criteria of innovation, potential impact, and presentation quality.

Submission
All submission should be made electronically in PDF format at  https://cmt3.research.microsoft.com/ATS2024/Submission/Index.   A submission should contain a complete manuscript within a limit 6 pages in 10-point single-spaced double-column format, an abstract of 50-200 words. The paper must be submitted for blind review process. Once a submission is accepted, the author(s) must prepare the final camera-ready manuscript in time for being included in the proceedings, and present the paper at the symposium. In case of any difficulty in submission, authors may contact ats2024.nu@nirmauni.ac.in

IMPORTANT DATES:
Paper submission deadline                 : August 15, 2024
Notification of acceptance                  : September 15, 2024
Camera-ready paper due                   : November 15, 2024

Conference:                                       :December 17, 2024                                                                                  

Submission Link: https://cmt3.research.microsoft.com/ATS2024/Submission/Index

The organizing committee of ATS 2024 invites you and your colleagues to submit research articles and attend this prestigious Symposium scheduled to be held at Ahmedabad (India), the epicentre of Indian Semiconductor Mission.

The Asian Test Symposium (ATS) provides an open forum for researchers and industrial practitioners from all countries of the world to exchange innovative ideas on system, board, and device testing with design, manufacturing and field consideration in mind. 

The 33^rd IEEE Asian Test Symposium (ATS 2024) is going to be held at Ahmedabad, Gujarat (India), the epicentre of India Semiconductor Mission during December 17-20, 2024.

Scope

Original papers on, but not limited to, the following areas are invited:
• Analog/Mixed-Signal Test
• Automatic Test Generation
• Board Test and Diagnosis
• Boundary Scan Test
• Built-In Self-Test (BIST)
• Defect-Based Test
• Delay and Performance Test
• Dependability and Functional Safety
• Design for Test (DFT)
• Diagnosis and Silicon Debug
• Economic of Test
• Failure Analysis
• Fault Modelling and Simulation
• Fault Tolerance
• GPU Test
• High-Speed I/O Test
• Low-Power IC Test
• Memory Test and Repair
• Test for MEMS and Microfluidic Systems
• Multi-/Many-core Processor Test
• Test for Nanoscale Devices and Emerging Technologies
• On-line Test
• Power/Thermal/Reliability Issues in Test
• Reconfigurable System Test
• Test for Biomedical Circuits and Systems
• RF Test
• Hardware-oriented Security and Trust
• Self-Repair
• Test for Sensors and IoT
• SiP, Stacked, 3D IC Test
• Standards in Test
• Machine Learning in Test
• Test Compression
• Test Quality
• Test Synthesis
• Validation and Verification
• Yield Analysis and Enhancement
• Test for Reversible and Quantum Circuits

Regular Sessions: The ATS’24 Program Committee invites original, unpublished paper submissions on the above topics. Paper submissions should be complete manuscripts, not exceeding six pages (including figures, tables, and bibliography) in a standard IEEE two-column format. The submission will be considered evidence that upon acceptance the author(s) will submit a final camera-ready version of the paper or inclusion in the proceedings, and will present the paper at the symposium. ATS reserves the right to remove from IEEE Xplore papers not presented at the symposium. The best paper will be selected by the ATS’24 Program Committee for the best paper award based on the criteria of innovation, potential impact, and presentation quality.

Submission
All submission should be made electronically in PDF format at  https://cmt3.research.microsoft.com/ATS2024/Submission/Index.   A submission should contain a complete manuscript within a limit 6 pages in 10-point single-spaced double-column format, an abstract of 50-200 words. The paper must be submitted for blind review process. Once a submission is accepted, the author(s) must prepare the final camera-ready manuscript in time for being included in the proceedings, and present the paper at the symposium. In case of any difficulty in submission, authors may contact ats2024.nu@nirmauni.ac.in

IMPORTANT DATES:
Paper submission deadline                 : August 15, 2024
Notification of acceptance                  : September 15, 2024
Camera-ready paper due                   : November 15, 2024

Conference:                                       :December 17, 2024                                                                                  

Submission Link: https://cmt3.research.microsoft.com/ATS2024/Submission/Index

The organizing committee of ATS 2024 invites you and your colleagues to submit research articles and attend this prestigious Symposium scheduled to be held at Ahmedabad (India), the epicentre of Indian Semiconductor Mission.